MCS51 AT89S51 microcontroller architecture

Microcontroller architecture we need to know if we will use this MCS51 microcontroller in a control MCS51 microcontroller-based electronic devices. AT89S51 microcontroller MCS51 architecture actually almost similar to the other MCS51. MCS51 Microcontroller AT89S51 is MCS51 family of microcontrollers with 40 pins. In this article MCS51 AT89S51 microcontroller architecture can be seen, although not all.

MCS51 Microcontroller Architecture AT89S51

AT89S51 microcontroller has several features, among others, as follows:

4 K bytes Flash PEROM

The frequency of 4 Hz - 24 MHz

128 x 8 bit Internal RAM

32 channels of I / O bi-directional

2 pieces of 16-bit timer

2 external interrupt and internal interrupt 3

A pair of serial communication ports

Here is a brief description of each leg functions contained in the microcontroller AT89S51.

GND (Ground) or grounding function as a negative supply or ground path.

VCC serves to route the positive power supply 5V DC to the microcontroller.

RST / Vpp is a microcontroller reset line with the transition low to high, Vpp is used as supply voltage when programming the microcontroller.

ALE / PROG, this foot is used to capture or to a low address latch (A0.. A7) to the external memory during normal operation. Receive a program pulse input during the programming of internal Flash PEROM.

PSEN Program Store Enable is the PSEN output is where the control signal or activate a program that allows an external memory (EPROM external) to the data bus during normal operation.

EA / Vpp (External Access Enable) is to direct the selection of program execution from external memory or internal memory and then starts a new external memory. Legs are also receive 12.75 V for Flash programming power supply PEROM.

XTAL1 is the input path to the amplifier oscillator on a microcontroller or external input source pulse from the microcontroller.

XTAL2 is the output path of the oscillator amplifier.

P0.1 - P0.7 is an output port / input (I / O) type bidirectional open-drain (without internal pullup). Port 0 can be configured as a bus address / data, the low (low byte) during the process of accessing the data memory and external programs.

P1.0 - P1.7 is I / O ports are equipped with two-way internal pullup. Port 1 also receives the address low during programming and verification of flash PEROM.

P2.0 - P2.7 is I / O ports equipped with two-way internal pullup. Port 2 is the high part of byte address (high byte) for taking instructions from external program memory and during programming and verification of flash PEROM.

P3.0 - P3.7 is I / O ports equipped with two-way internal pullup. Port 3 has alternative functions, including receiving the control signals along with the port 2 during programming and verification of flash PEROM.

Microcontroller AT89S51 has a data memory address space and a separate program. The separation of program memory and data memory allowing the data accessed by an 8-bit addresses, allowing you to quickly and easily stored and manipulated by an 8-bit CPU. Internal memory location 0000H to the program occupies 0FFFh, while for external memory location 1000H to occupy FFFFH. Data memory occupies a separate address space from Program Memory.